Probably an obvious question, is there a limit on how many clock dividers you could link up, so say you come out of the Div by 8 then that went into the Clk of another Clock divider and you divided the 8 from the first by 16.... you get the idea, then you go on and on!!

I'm guessing the answer is Yes, so its a way of pushing events further away via clock pulses.


Now, I'm no EE guy, but I'd wager if the circuits are designed and built well, you should be able to construct an endless chain of clock dividers. Generally, all they're doing is counting the steps that are coming in, so you're not clocking a PLL or something like that that's attempting to keep pace with a steady signal. So if you're looking to get a bunch of subdivisions down to 1/4096, I wouldn't doubt that that would be possible


Yes, chaining clock dividers can lead to some very long clock divisions. There really isn't a limit either, other than how long you want to wait. The technique is super useful for generating evolving sequences, you can take clock pulses off of different dividers and use those to trigger tempo_synced LFOs.


Cheers guys :) Very helpful.